////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2008 Xilinx, Inc.  All rights reserved.
////////////////////////////////////////////////////////////////////////////////
//   ____  ____ 
//  /   /\/   / 
// /___/  \  /    Vendor: Xilinx 
// \   \   \/     Version : 10.1
//  \   \         Application : sch2verilog
//  /   /         Filename : Top.vf
// /___/   /\     Timestamp : 12/12/2008 22:41:17
// \   \  /  \ 
//  \___\/\___\ 
//
//Command: C:\Xilinx\10.1\ISE\bin\nt\unwrapped\sch2verilog.exe -intstyle ise -family spartan3e -w "C:/Documents and Settings/William Lee/My Documents/cs3710/CR16/Top.sch" Top.vf
//Design Name: Top
//Device: spartan3e
//Purpose:
//    This verilog netlist is translated from an ECS schematic.It can be 
//    synthesized and simulated, but it should not be modified. 
//
`timescale 1ns / 1ps

module Top(CLOCK, 
           Reset, 
           switches, 
           LED);

    input CLOCK;
    input Reset;
    input [3:0] switches;
   output [7:0] LED;
   
   wire [4:0] flagsEnables;
   wire [7:0] Imm;
   wire [2:0] XLXN_15;
   wire XLXN_16;
   wire XLXN_18;
   wire XLXN_19;
   wire XLXN_20;
   wire XLXN_21;
   wire XLXN_22;
   wire XLXN_23;
   wire XLXN_24;
   wire XLXN_26;
   wire XLXN_27;
   wire XLXN_28;
   wire XLXN_29;
   wire XLXN_30;
   wire [1:0] XLXN_31;
   wire [15:0] XLXN_76;
   wire [15:0] XLXN_97;
   wire [3:0] XLXN_103;
   wire [3:0] XLXN_106;
   wire XLXN_108;
   wire XLXN_109;
   wire [15:0] XLXN_110;
   wire [15:0] XLXN_111;
   wire XLXN_113;
   wire XLXN_114;
   wire [15:0] XLXN_115;
   wire [15:0] XLXN_120;
   wire [15:0] XLXN_121;
   wire XLXN_123;
   
   CR16M XLXI_6 (.ALUOp(XLXN_15[2:0]), 
                 .ALUOutSelect(XLXN_21), 
                 .alusrcaSelect(XLXN_19), 
                 .alusrcb(XLXN_31[1:0]), 
                 .CLOCK(CLOCK), 
                 .immediateALUSrcA(XLXN_29), 
                 .IREnable(XLXN_20), 
                 .JALSelect(XLXN_28), 
                 .jump(XLXN_27), 
                 .LUIEnable(XLXN_30), 
                 .memData(XLXN_110[15:0]), 
                 .MemtoReg(XLXN_24), 
                 .PCEnable(XLXN_23), 
                 .regWrite(XLXN_18), 
                 .RESET(Reset), 
                 .shiftImmediate(XLXN_22), 
                 .shiftSelect(XLXN_26), 
                 .zeroExtend(XLXN_16), 
                 .cond(XLXN_106[3:0]), 
                 .imm(Imm[7:0]), 
                 .memAddress(XLXN_120[15:0]), 
                 .opCode(XLXN_103[3:0]), 
                 .PSRFlags(XLXN_97[15:0]), 
                 .writeData(XLXN_115[15:0]));
   flagreg XLXI_7 (.a(XLXN_97[15:0]), 
                   .C(flagsEnables[4]), 
                   .clk(CLOCK), 
                   .F(flagsEnables[2]), 
                   .L(flagsEnables[3]), 
                   .N(flagsEnables[0]), 
                   .reset(Reset), 
                   .Z(flagsEnables[1]), 
                   .flags(XLXN_76[15:0]));
   Decode XLXI_9 (.Clk(CLOCK), 
                  .cond(XLXN_106[3:0]), 
                  .extendedOpCode(Imm[7:4]), 
                  .flag(XLXN_76[15:0]), 
                  .opCode(XLXN_103[3:0]), 
                  .reset(Reset), 
                  .ALUOp(XLXN_15[2:0]), 
                  .ALUOutSelect(XLXN_21), 
                  .ALUSrcA(XLXN_19), 
                  .ALUSrcB(XLXN_31[1:0]), 
                  .flagsEnable(flagsEnables[4:0]), 
                  .immedateALUSrcA(XLXN_29), 
                  .IRWrite(XLXN_20), 
                  .JALSelect(XLXN_28), 
                  .jump(XLXN_27), 
                  .LUIEnable(XLXN_30), 
                  .memEnable(XLXN_108), 
                  .MemtoReg(XLXN_24), 
                  .memWrite(XLXN_109), 
                  .PCEnable(XLXN_23), 
                  .regWrite(XLXN_18), 
                  .shiftImmediate(XLXN_22), 
                  .shiftSelect(XLXN_26), 
                  .zeroExtend(XLXN_16));
   LEDReg XLXI_10 (.clk(CLOCK), 
                   .Data(XLXN_111[15:0]), 
                   .push(switches[3:0]), 
                   .reset(Reset), 
                   .addr(XLXN_121[15:0]), 
                   .Enable(XLXN_113), 
                   .LED(LED[7:0]), 
                   .writeEnable(XLXN_114));
   TestRAM XLXI_12 (.clock(XLXN_123), 
                    .Enable(XLXN_108), 
                    .Enable2(XLXN_113), 
                    .memAddress(XLXN_120[15:0]), 
                    .vgaAddress(XLXN_121[15:0]), 
                    .writeData(XLXN_115[15:0]), 
                    .writeEnable(XLXN_109), 
                    .writeEnable2(XLXN_114), 
                    .memData(XLXN_110[15:0]), 
                    .vgaData(XLXN_111[15:0]));
   INV XLXI_13 (.I(CLOCK), 
                .O(XLXN_123));
endmodule
